Info
This document is part of an original submission for the RP2350 Hacking Challenge.
For more detailed and up-to-date content, refer to “Laser Fault Injection on a Budget: RP2350 Edition”.
RP2350 “Backside” Electronic Boards
Overview
A set of custom PCBs has been designed. These two boards are compatible with the Laser Fault Injection Platform and are used to communicate with the target RP2350
.
The large “Main” board can be precisely moved on top of the Laser Fault Injection Optics thanks to the motorized delta stage of the Laser Fault Injection Platform.
Various signals and connectors are exposed, allowing for communication with the target or triggering laser pulses at specific times.
Main Carrier Board
This board is placed on the delta stage.
A hole in the middle exposes the backside of the RP2350
die.
There’s not much on it, apart from the RP2350
and a small LDO used to power the core. Power and control signals are routed away to an FFC connector.
flowchart LR B{{FFC Connector}} <-->|UART| A(RP2350) A <-->|SWD| B A <-->|USB| B A <-->|QSPI| B A <-->|Control Signals| B B .->|3V3| A B .->|3V3| C((LDO)) C .->|1V1|A
The board has been hand-assembled, and the total unit BOM cost for small quantities is estimated at less than €10.
Schematics and an interactive BOM are available from the Electronic Schematics & Interactive Renders Page.
I/O Board
The I/O board connects to the main board with a FFC.
It breaks out the various control signals over:
- A USB connector
- Pin headers that are connected to the FPGA board running the attack’s logic
- A few test points used for SWD debugging (seldom used, especially considering SWD needs to be disabled for this challenge)
flowchart TB A((LDO)) .->|3V3| B((Power Switch)) C{{USB Connector}} .->|5V| A C <-->|USB| D{{FFC Connector}} B .->|3V3| D E{{Pin Headers}} -->|Enable| B D <-->|Control Signals| E D <-->|QSPI| E D <-->|UART| E D <-->|SWD| F(Test Points) D <-->|QSPI| G(QSPI Flash #0) D <-->|QSPI| H(QSPI Flash #1)
Additionally, two QSPI flashes are mounted to the board. The “active” flash, i.e. the one connected to the ~CS
line of the RP2350
, can be selected from the FPGA. The “active” flash can be selected at any time.
This feature, detailed in the following diagram, is instrumental for the attack described in this submission.
flowchart LR A(RP2350) -->|CS| B(FPGA) B -->|CS#0| C(QSPI Flash #0) B -->|CS#1| D(QSPI Flash #1)
Here again, the board has been hand-assembled. The total unit BOM cost for small quantities is estimated to be less than €15.
Schematics and an interactive BOM are available from the Electronic Schematics & Interactive Renders Page.
Last update: November 23, 2024